PrjTrellis -- General discussion around Project Trellis, documentation (and tools) for the Lattice ECP5 bitstream (https://github.com/symbiflow/prjtrellis)

 

About PrjTrellis
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Project Trellis

Project Trellis aims at documenting the Lattice ECP5 bit-stream, so that Open Source tools can be built. Project Trellis currently contains enough bitstream documentation to generate simple test bitstreams - including complete documentation for logic and interconnect tiles, and partial documentation for IO and EBR tiles. Work is ongoing to document more advanced parts of the ECP5 such as PLLs and DSPs.

SymbiFlow

SymbiFlow is a FOSS Verilog-to-Bitstream FPGA synthesis flow for Xilinx 7-Series, Lattice iCE40 and Lattice ECP5 FPGAs. It consists of a number of subprojects.

To see the collection of prior postings to the list, visit the PrjTrellis Archives.

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