[Librecores Discussion] RISC-V Port to Parallela GSoC'16 Project
olof.kindgren at gmail.com
Wed Jun 1 22:25:12 CEST 2016
It's great to see that you're getting into the project. I'll
definitely check out your posts and make sure that everyone who is
even remotely interested in the topic knows about your blog :)
Keep up the good work!
On Wed, Jun 1, 2016 at 9:59 PM, Elias Kouskoumvekakis
<eliaskousk at gmail.com> wrote:
> Hello everyone,
> Google's Summer of Code 2016 has started last week and I just wanted to
> announce here my FOSSi project "RISC-V port to Parallela" which as the name
> suggests will have me working for the next 3 months with the goal of
> successfully porting and integrating a RISC-V ISA based core from UC
> Berkeley inside the Zynq FPGA device of the Parallela board.
> You can find out more about the project and see my progress each week on my
> blog which I launched last week. I would appreciate any comments and / or
> suggesting you might have. Even reading some of my weekly posts is enough to
> motivate me working hard during the hot summer days in Athens!
> Best regards,
> Discussion mailing list
> Discussion at lists.librecores.org
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