[Librecores Discussion] FOSS and proprietary FPGA verification as a service

Christian Svensson christian at cmd.nu
Wed Aug 26 15:46:50 CEST 2020


On Wed, Aug 26, 2020, 15:37 Philipp Wagner <mail at philipp-wagner.com> wrote:

> Well, it's at least moving :-)
>

Yes, it wasn't meant as criticism - I was just maybe having an unrealistic
optimistic stance :-).

At the same time, open source EDA is picking up rapidly, which avoids
> all those tedious licensing and availability discussions.
>
> On the simulation front, Verilator is fantastic both in features it
> currently supports and in development speed.
>

Indeed. My current testbenches are using MyHDL and linting using verilator
and iverilog. Thinking about going over to cocotb as well.

However some hard IPs are in these encrypted blobs, which is the only way I
have found to get good integration tests. To my knowledge no open source
products is able to deal with those. In some cases it's possible to
manually create a simplified version of the IP (based on docs and observed
behavior) to be used in a open testbench but that takes time and it's easy
to miss stuff. Had some annoying bugs because of that.

I hadn't heard of Verible though, will check that out.
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