[Open SoC Debug] GSoC-18, Open SoC Debug

Roman Demenko roma.dmnk at gmail.com
Sun Mar 25 18:01:45 CEST 2018


Hello.

My name is Roman Demenko, I'm a PhD student at MIPT
(Moscow Institute of Physics and Technology, Russian Federation).

I'm curious about GSoC and Open SoC Debug in particular.

Here is a draft proposal on
Efficient control-flow tracers (hardware trace compression)
https://docs.google.com/document/d/119D_8Vag20rBCSxPYeMZ_csj
onb6KEjGgRiiVmkPKx8/edit?usp=sharing

Previously I sent this mail to discussion at lists.librecores.org,
and send to this mail list just in case.

Would appreciate some feedback.

Here is a brief description:
Debug infrastructure generate trace data on specific events and
transfer correspondence data to host, where it can be gathered and
analysed. To make this approach efficient trace data should be compressed in
hardware and decompressed on host.
For this purpose hardware implemented Lempel-Ziv algorithm can be
used.
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