[Open SoC Debug] CDM-OR1K implementation

SHIVAM AGGARWAL shivam16195 at iiitd.ac.in
Thu May 17 15:37:25 CEST 2018

Thanks for the detailed and informative response for the CDM-OR1K
I think it is the perfect time to work on the implementation of Core Debug

Few attributes of CDM-OR1K from the spec:

   - Provides a register map for OR1K debug registers: Something similar to
   one in MAM but less complicated (We have already mapped them in
   - To allow GDB access to these mapped registers using
   osd_regaccess_layer: Similar to this implementation
   - How are the input/output values (input dii_flit debug_in, output logic
   debug_in_ready, output dii_flit debug_out, input debug_out_ready)
   determined? Are these values similar to enable signals?
   - Next we need to ensure that we can interact (i.e., read/write
   operation) with the or1k debug unit effectively. For write, we already have
   an update write register.
   - Debug stall event packetization. Do we need something similar to

   - In the attached or1200 architecture
   there is quite a good explanation for debug development interface (Page 48
   onwards). In or1200, there is dbg_op_i[2:0] to choose between different
   operations. But, I couldn't find the one in mor1kx code. I need a little
   more help in that part.
   - Do we need to make changes to the mor1kx code?

All the stuff related to CDM-OR1K will be in this repository:

There is already an issue related to CDM for mor1kx

-Shivam Aggarwal
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