[Open SoC Debug] CDM-OR1K implementation
shorne at gmail.com
Fri May 18 13:31:48 CEST 2018
On Thu, May 17, 2018, 10:37 PM SHIVAM AGGARWAL <shivam16195 at iiitd.ac.in>
> Thanks for the detailed and informative response for the CDM-OR1K
> I think it is the perfect time to work on the implementation of Core Debug
> Few attributes of CDM-OR1K from the spec:
> - Provides a register map for OR1K debug registers: Something similar
> to one in MAM but less complicated (We have already mapped them in
Is it possible to not make this specific to or1k. I figure the cdm needs to
1 an interface to read/write registers with an address like memory
2 stall / resume the CPU
3 notify debugger of a stall
The mapping and definitions of registers sounds like something target
specific which should be handled in software.
Taking the read/write address And converting it to the or1k register is
done in mor1kx already.
This is also all the advanced debug interface does. See:
"The OR1ON CPU sub-module is designed to allow a software debugger to access
the internal registers of a CPU, to stall the processor, and to take
control when a
breakpoint occurs in software."
Sorry if I am missing something.
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