[Open SoC Debug] CDM-OR1K implementation

Philipp Wagner philipp.wagner at tum.de
Wed May 23 18:13:09 CEST 2018


Am 23.05.2018 um 18:09 schrieb SHIVAM AGGARWAL:
> 
> On Wed, May 23, 2018 at 5:44 PM, Philipp Wagner <philipp.wagner at tum.de
> <mailto:philipp.wagner at tum.de>> wrote:
> 
>     Hi,
> 
>     On 05/23/2018 10:36 AM, SHIVAM AGGARWAL wrote:
> 
>          1.
> 
>             *Register map for SPRs and GPRs in CDM-OR1K*:
> 
>         We can easily map 32-bit wide 32 GPRs as two 16-bit OSD specific
>         registers in the module. We already have access to the debug
>         unit for setting watchpoints/breakpoints.
> 
>         In GDB, there are commands like ‘info spr’ used to show the
>         value of a SPR or group of SPRs and ‘spr’ to set the value of an
>         individual SPR. There are about 12 groups (permitted upto 32)
>         with some groups (1, 2 and 3) having 1000+ SPRs.
> 
> 
>         We can assign address spaces 0x0200-0xffff (about 65023
>         registers) as module specific registers in CDM-OR1K. The space
>         is enough to map each or1k register into OSD address space.
> 
> 
>     Could you list the full register map somewhere in a document (the
>     list can contain groups, but should list all relevant register
>     addresses and their mapping to OSD CDM register addresses). The
>     du_addr_i signal is a 16 bit signal, given that we don't have full
>     16 bits available for register address in OSD (we can only start
>     above 0x200) we need to make sure that we map all relevant parts of
>     the or1k register space to OSD registers.
> 
> 
> Link:
> https://drive.google.com/open?id=15EVkp6ij-7tRm2m3mgQqwUAhHUYLOkxG
> The pdf contains all the information about OR1K Register Set. Section
> 4.3 contains the list of all the Special Purpose registers. As per my
> understanding, we have to map each and every register (total 4665 SPRs +
> 32 GPRs) given in the description. 

That link is only the or1k register set. Could you please create a own
document where you show how these registers are mapped to CDM registers?
Ideally using (as discussed before) the same register addresses only
with an offset (i.e. + 0x400).

Philipp


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