[Open SoC Debug] CDM-OR1K implementation

Philipp Wagner philipp.wagner at tum.de
Fri May 25 09:07:22 CEST 2018


On 05/25/2018 12:00 AM, Stafford Horne wrote:
> On Fri, May 25, 2018 at 12:20:08AM +0530, SHIVAM AGGARWAL wrote:
>> Hi,
>>
>> On Thu, May 24, 2018 at 10:07 PM, Philipp Wagner <philipp.wagner at tum.de>
>> wrote:
> ...
>>> SPR to CDM register address mapping
>>>
>>> - Map SPRs to CDM address 0x8000 to 0xFFFF (msb set). This gives 15 bit of
>>> address space.
>>>
>>> - Have a separate register called CORE_REG_UPPER which contains the msb of
>>> the address.
>>>
>>> - The SPR register address is then calculated as
>>>    spr_reg_addr = CORE_REG_UPPER << 15 | cdm_reg_addr - 0x8000
>>>
>>> - As long as the msb of a SPR register address (spr_reg_addr[15]) does not
>>> change the CORE_REG_UPPER register does not need to be modified, nicely
>>> generating one (1) OSD operation for a one (1) SPR register access.
>>>
>>
>> This is a very neat way of mapping.
>>
>> 1. The final mapping will be something like this: https://docs.google.com/
>> document/d/1qlmbhIvUt8XnSjvwAyiwyRDp6zeeJtN1Lz6WafBWn2o/edit?usp=sharing

Yes. But given the fact that we only do "dumb" address translation using 
the "formula" there's no need to limit the accessible registers to the 
ones you mentioned in the Google Docs.

>> 2. Since, we are mapping each SPR into exactly one OSD register, we need to
>> change the width of the OSD register from 16 bits to 32 bits, right?

Yes, this was assumed in the description, and we should go ahead and 
implement it instead of finding tricky workarounds.

>> 3. We need to map only first 10 groups in the module. This implies that MSB
>> for each group will always be 0. So, we can even omit the CORE_REG_UPPER
>> part.
> 
> I would go with Philipp's method.  We should use the SPR bus for all register
> access.  16 bit should be enough using the 2 register method philipp described.

Shivam, don't omit the CORE_REG_UPPER register, even though it might not 
be used in the or1k case. Two reasons for that:

- The or1k spec explicitly allows SPRs above 2^15. To be fully 
conformant we therefore need a 16 bit address.

- The CDM in its currently discussed form is independent of the or1k 
implementation. Using the CORE_REG_UPPER register makes extending the 
implementation to, say, 24 bit register addresses of a different core easy.

Philipp


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